As a means for mounting a semiconductor element on a supporting board such as a circuit board, so-called flip chip mounting (mounting in a face-down manner) is applied. In the flip chip mounting, a main surface (a surface where an electronic circuit is formed) of the semiconductor element faces the supporting board. Projection electrodes called bumps made of conductive materials are provided on the main surface of the semiconductor element and the projection electrodes are connected to electrode terminals on the supporting board.
As a manufacturing method of a semiconductor device including the flip chip mounting (mounting in the face down manner), the following method has been conventionally used. A manufacturing method of a semiconductor device of the related art is illustrated in FIG. 1 through FIG. 4.
A semiconductor substrate (wafer) 1 is prepared having a main surface where a so-called wafer process is applied so that plural semiconductor elements (LSI elements) are formed. An ultraviolet (UV) curing type dicing tape 2 is adhered on a rear surface (electronic circuit non-forming surface) of the semiconductor substrate 1. The semiconductor substrate 1 is fixed to a wafer ring (frame) 3 via the dicing tape 2. See FIG. 1A. On another main surface (semiconductor element forming surface) of the semiconductor substrate 1, projection electrodes (bumps) as outside connection terminals are provided in each area of the semiconductor elements.
Next, the semiconductor substrate 1 is divided vertically and horizontally (orthogonally) by a blade dicing method using a dicing saw 4 so that each of the semiconductor elements is cut off and separated from the semiconductor substrate 1. See FIG. 1B.
Next, ultraviolet (UV light) is applied from a rear surface side of the dicing tape 2 so that an adhesive layer of the dicing tape 2 is cured. See FIG. 1C. As a result of this, adhesive strength of the dicing tape 2 is reduced so that the semiconductor element having been cut off can be peeled off.
After that, a thrust-up pin (not illustrated in FIG. 1) is pushed up from underneath the dicing tape 2 so that the semiconductor element having been cut off is peeled off from the dicing tape 2. Simultaneously, by using an absorption tool 5 waiting above, a semiconductor element 6 is attracted and transferred to a tray 7. See FIG. 2D. As a result of this, the semiconductor element 6 is received in the tray 7.
Next, the semiconductor element 6 received in the tray 7 is picked up by using a pick-up tool 8. Then, the pick-up tool 8 is inverted up and down so as to pass the semiconductor element 6 to a bonding tool 9 waiting above. See FIG. 2E.
On the other hand, an adhesive 11 made of thermosetting resin or the like such as paste epoxy group resin is applied to a portion of an upper surface of a wiring board 10 where the semiconductor element 6 is mounted and fixed in the following step. See FIG. 2F.
Next, by using an image processing apparatus (not illustrated in FIG. 2), the semiconductor element 6 and the wiring board 10 are positioned. The semiconductor element 6 is flip-chip mounted (mounted in a face-down manner) on the wiring board 10 while heating and pressing are applied by using the bonding tool 9. See FIG. 2G.
As a result of this, projection electrodes (bumps) 12 provided on the semiconductor elements 6 are connected to electrodes 13 of the wiring board 10. See FIG. 3H.
At this time, the adhesive 11 (see FIG. 2F) is cured by heating so that the adhesion of the semiconductor elements 6 and the wiring board 10 is strengthened and parts where the semiconductor elements 6 and the wiring board 10 are connected are protected from external environmental conditions such as moisture.
Next, plural semiconductor elements 6 mounted on the main surface of the wiring board 10 are sealed in a body by resin. More specifically, the wiring board 10 is provided at a mold 14. Sealing resin 15 is supplied into a cavity where one of the main surfaces of the wiring board 10 is arranged so that sealing by resin is performed. See FIG. 3H.
Next, plural solder balls as outside connection terminals 16 are provided on another main surface of the wiring board 10. See FIG. 3I.
After that, the wiring board 10 and the sealing resin 15 are divided along dotted lines X-X′ by the blade dicing method using the dicing saw 17 so that each unit has a part of the wiring board 10, one of the semiconductor elements 6 sealed by the sealing resin 15 on the main surface of the wiring board 10, the adhesive 11, and others. See FIG. 4J.
As a result of this, a semiconductor device 18 is formed where the semiconductor element 6 is flip chip mounted (mounted in a face-down manner) on the wiring board 10 and is sealed by the sealing resin 15. See FIG. 4K.
The following example has been suggested. That is, when a chip is to be die bonded by pushing a rear surface (lower surface) of the chip, held by suction on a contact collar, against a chip-mounting area of a multi-wiring board, a protective tape is previously applied on a main surface of the chip. See Japanese Laid-Open Patent Application Publication No. 2003-234359. In addition, the following example has been suggested. That is, a semiconductor device is provided with a polyimide substrate on top of which copper wiring is formed, conductive connecting plugs which are provided in the polyimide substrate and are connected to copper wiring, solder balls which are formed on the rear side of the polyimide substrate and are connected to the copper wiring through the connecting plugs, a semiconductor chip which is face-down bonded to the top of the polyimide substrate, gold bumps which are mounted on the semiconductor chip and are connected to the copper wiring, an anisotropic conductive film disposed between the semiconductor chip and the polyimide substrate and a protective film provided on the whole rear side of the semiconductor chip. See Japanese Laid-Open Patent Application Publication No. 2001-68603.
Furthermore, the following example has been suggested. That is, a semiconductor chip 1a is provided with a chip back protective layer bonded on its back side through an intermediary adhesive layer, and is mounted on a circuit board through intermediary solder bumps formed on the surface of the circuit board. The solder bumps are melted by heating to bond the semiconductor chip and the circuit board together, and an adhesive layer 5 is softened to cover the side of the semiconductor chip with the adhesive layer 5. See Japanese Laid-Open Patent Application Publication No. 2005-26311.
However, the above-discussed manufacturing method of the semiconductor device has the following problems.
In other words, in a step illustrated in FIG. 2G, the semiconductor element 6 is flip-chip mounted (mounted in a face-down manner) by using the bonding tool 9 so that the projection electrodes (bumps) 12 provided on the main surface of the semiconductor element 6 are connected to the electrodes 13 of the wiring board 10.
At this time, the adhesive 11 provided between the wiring board 10 and the semiconductor element 6 creeps up along a side surface of the semiconductor element 6. In addition, the adhesive 11 expands from the side surface of the semiconductor element 6 to a surface of the wiring board 10 situated in a periphery so that a so-called filet is formed. See FIG. 5.
While attracted or held by the bonding tool 9, the semiconductor element 6 is heated and pressed so as to be fixed to the wiring board 10. At this time, viscosity of the adhesive 11 on the wiring board 10 is decreased. In addition, due to surface tension of the adhesive 11, the adhesive 11 creeps up along the side surface of the semiconductor element 6 and expands to the surface of the wiring board 10 so that the filet is formed.
Such a filet is preferable in terms of improvement of reliability of connection for solidifying with great contacting force at the time of solidification of the adhesive 11.
However, if the amount of application of the adhesive 11 is too much, the adhesive 11 creeps up so as to extend beyond the thickness of the semiconductor element 6. As a result of this, as illustrated in FIG. 6, a part of the adhesive 11 comes in contact with a lower surface of the bonding tool 9. FIG. 6B is an expanded view of a part surrounded by a dotted line in FIG. 6A.
Since the bonding tool 9 is heated so as to have high temperature, the adhesive 11 which comes in contact with the lower surface of the bonding tool 9 is cured. As a result of this, as illustrated in FIG. 7, the adhesive 11 is adhered to the lower surface of the bonding tool 9 and remains.
As a result of this, flatness of the surface semiconductor element attracting surface of the bonding tool 9 is interrupted. Hence, when the semiconductor element 6 to be bonded next time is held for the bonding process, a bad connection of the semiconductor element 6 to the wiring board 10 may occur due to such as generation of holding error, uneven heating of the semiconductor element 6, or lack of increase of temperature of the part where the semiconductor element 6 and the wiring board 10 are connected.
In addition, the adhesive 11A which is adhered and solidified has a projection-shaped configuration. Accordingly, bonding loads are concentrated where the projection is the base point at the time of the bonding process so that a crack may be generated in the semiconductor element 6.
In addition, it is difficult to detect and remove the adhesive 11A. Furthermore, even if the adhesive can be removed, it is normal practice that a means for detecting the removal of the adhesive 11 is not provided in the bonding apparatus. Therefore, once the adhesive 11A is formed, bad semiconductor devices may be manufactured without notification of this situation.
As the thickness of the semiconductor element 6 is less, adhesion of the adhesive 11 to the bonding tool 9 due to creeping up of the adhesive 11 may be easily generated. Hence, accompanying the demand for thin sizes of the semiconductor devices, such a problem may be further increased.
In order to solve such a problem, it is necessary to prevent the adhesive 11 from being adhered to the bonding tool 9.
This problem may be avoided by reducing the amount of application of the adhesive 11 to the wiring board 10. However, as a result of this, reliability of the adhesion between the semiconductor element 6 and the wiring board 10 may be degraded so that the reliability of the semiconductor device may be also degraded.
In addition, a function for detecting that the adhesive 11 is adhered to the bonding tool 9 may be added to the bonding apparatus. However, cost for adding such a function is incurred. In addition, manufacturing process capabilities may be degraded due to the detection process, so that increase of the manufacturing process may occur.